l Introduction Great changes have taken place in today's electronic components or PWBs. The 1C package is developed by the miniaturization of the chip size toward the three-dimensional mounting of a memory or the like. The passive device is accelerated from a chip component to a ceramic-based laminate component, and it is developed in the direction of a 1C-embedded passive component substrate module or package. They have begun to move toward resin-based substrates, especially in the direction of embedding passive and active element substrates. Silicon (Si) chips have also emerged as integrated passive device chips that are suitable for 1C packaged interposer substrates, accelerating the development of embedded passive device substrates. This article describes the technology trends embedded in electronic component substrates.

2 Trends of electronic parts technology With the reduction in size, performance, and versatility of electronic devices, 1C packages have evolved from single-chip QFPs and TCPs to small-scale BGAs and CSPs, up to the same chip level as bare chips ( Waferlevel) CSP (see Figure l(a)-(d)). In addition, the development of two-dimensional elements of two-dimensional 1C chips or MCP (Multi-ChipPackage) or MCM (Multi-Chip Module) is also accelerating (see (e)-(i)), 1 The development of chip-based system LSIs is also very active (see Figure l(j)). Then, due to the system LSI design, Cai Caiqing, he worked in Nanjing Radio Eight Factory for a long time in PCB technology work and published many articles in the journal.

Miscellaneous, long development time, can not be applied to a short life cycle or a small number of varieties of products, but also due to the need to combine with the new 1C, so future MCP or MCM and other multi-chip installation is still inevitable.

The above-mentioned two-dimensional configuration MCP (see FIG. l(g)-(i)) has 2-4 chip stacked products, and is becoming a necessity for the installation of mobile phones. In 1 to 2 years, there will be 56 chip stacked products. It is difficult to have more multichip stacks in the same package, but Fujitsu has combined with thin package stack technology to develop an 8-chip stacked module (Fig. l(i)). Combined with a chip thickness of 25 chips, the 8-chip 2.0mm thickness can be achieved using this process. In the near future, a 10-chip stack can be obtained. In the future, with the urgent requirements of ultra-compact, high-density and multi-functionality, 3D mounting products for 1C chips will increase dramatically.

Passive chip parts such as C, R, and L, and the 0603 (0.6mmx0.3mm) size introduced around 1996 are becoming the main parts of the portable equipment. In 2002 CEATECShow exhibited 0402 size products. In terms of manufacturing and installation, they are all approaching the limit ((a)). Therefore, in order to avoid excessive miniaturization of chip parts, technology development has been conducted to increase the component mounting density and achieve a narrow pitch of 0.1 mm.

Directionality of ceramic-based chip parts Due to the difficulty of manufacturing and mounting microchip devices and the poor installation efficiency or workability of individual components, a number of identical or different passive components are combined in two-dimensional or three-dimensional composite devices ((8) And (c)). Recently, with the rapid increase of mobile phones, the modularization trend of carrying 1C is accelerating (Figure (d)). However, the high performance, versatility, and thinness and shortness that are only required for electronic devices are not enough. The demand for high-speed, high-frequency and ultra-small portable devices ranging from several GHz to several tens of GHz is rapidly increasing. Substrates and electronic parts are used. Conventional SMT type high-density mounting methods, which are manufactured and combined separately, are difficult to meet requirements for improved performance, compactness, and thinness. Therefore, the recent incorporation of passive elements and 1C in the substrate can shorten the connection length between parts and can also suppress LRC delays, noise, and heat problems caused by wiring. The installation method shifts from SMT to the rear SMT, which can not only improve the performance of the electronic equipment, realize the light and thinness of the electronic equipment, but also increase the reliability due to the reduction of the welded parts and reduce the overall installation cost.

3 Ceramic-based composite devices embedded in passive components substrates can be traced back to low-temperature sintered glass-ceramic substrates developed in the 1970s. lt: Substrate sintered below can be embedded in 800t to 900t: sintered thick-film or thick-film capacitors, 1980 In the middle of the decade, it became practical (). This configuration is to print devices such as LRC on a glass-ceramic substrate, and then sintered once after lamination. However, because of the small selection range, it is generally used only for special purposes. In the latter half of the 1980s, technologies were developed to print electrodes on ferroelectric materials such as barium titanate (BaTiQ) or ferrites or ferromagnetic green sheets, and then sintered into passive composite elements after deposition ((c)). Since the sintering shrinkage or the coefficient of thermal expansion of the green sheets is accumulated at the same time and one shot at a time requires a highly adaptable composition or sintering process, great efforts have been made by the electronic component maker or the ceramic manufacturer.

Low Temperature Sintered Glass Ceramic Substrate Ag-Pd Thick Film Conductor Inductors. BaTiCb-based thick-film Ag-Pd-based thick-film conductor buried passive component low-temperature-sintered glass-ceramic multilayer substrate structure example In the early 1990s, a passive component-based module with 1C or buried in a composite component appeared ( d)) This ceramic substrate-based hybrid 1C or MCM lays the foundation for embedded electronic component substrates. From the 1990s to the present day, the rapid expansion of portable devices has advanced the use of high-frequency modules, such as Bluetooth modules, and commercially available 10mm x 10mm ultra-small modules have been commercially available. In the future, there will be more modules embedded in the module or insertion boards extending to the 1C package.

However, due to the brittleness of the ceramic substrate, it is not suitable for a large thin substrate, but is limited to a dedicated small module or package. In addition, tens of percent of sintering shrinkage occurs when the substrate is heated up, electrical inspection cannot be performed, and it is difficult to embed high-precision components. Since it cannot be trimmed before and after sintering, it is still difficult to form a resistance within ±1% of the error value. Therefore, the degree of fluctuation is suppressed while suppressing the sintering.

1% or less, while developing the technology of sintering shrinkage in the xy direction, the precision of embedded parts is further improved. Through these efforts, it is expected that ceramic products after 2 to 3 years can be embedded in high-precision components. Another problem with ceramic products is that they must be sintered at a high temperature of around 1000 t. It is difficult to bury the substrate of the 1C chip. This problem can be avoided in the later described resin-based substrate.

4 Trends of Si Substrate Integrating Passive Components Until now, ceramic substrates have dominated the integration of passive components and buried substrates. However, recently, an LDC passive device integrated device (IPD, Integrated Passive Device) formed on a Si substrate using a semiconductor process was introduced. Although Si chips without passive elements have been integrated so far, large-value passive elements that can hardly be buried in the semiconductor 1C can be integrated in the Si chip.

IPD example. STMicroelectronis can integrate more than 30 passive components on one chip (: 5 to 50 (the ferroelectric thin film, just l ~ lkll diffusion resistance, L is the spiral conductor inductance, can also be embedded in the transistor if necessary Array capacitances (1.60mmx1.85mm) of active components, etc. This passive component chip can be incorporated into the PWB or 1C chip of the flip chip or CSP structure ((a)), and also applicable to the MCPSi substrate. The insert ((b)) should be a true SoS (SionSi) configuration.The advantages of these configurations are: (1) small size, thin profile, and (2) improved performance and reliability due to reduced parasitic elements.

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